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Intelligent IP for FPGAs & Std-Cells |
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Focus on intelligent IP containing processor(s) & firmwareSelf contained IP blocksExample: UDP/IP/Ethernet data streaming from/to a custom interface Example: data streaming from/to SD flash cards to/from a custom interface Example: MP3 playback from network or SD card Intelligent PeripheralsOffload the SoC's main CPU from time-critical, low-level tasks Example: MPEG transport demux with A/V streaming, lip sync and data filtering Design ServicesDigital circuit development based on customer specificationIP Blocks and complete FPGA designs Fast time-to-market due to high reuse potential of components from the existing IP pool Adaptation/Modification of availabe IPs from the poolE.g. to meet interface requirements of the target application Large pool of available IPsProcessors & DSPsOverviewEthernet MAC, 100MB, 1GB, MII or RGMII PHY interface SD/SDHC/eMMC Host Controller, 1-bit/4-bit/8-bit card I/f Serial I/O: SPI, I2C, UART, ISS, PS2, IR-Remote Memory-I/f: SDRAM, DDR-SDRAM, NOR-FLASH, SPI-FLASH, EEPROM Display-Controllers: bilinear resizing, YCrCb->RGB color conversion Misc.: I/D Caches, DMA, Timers, Interr.-Contr., Debug-I/f MP3 audio decoder, optimized firmware for the eco32 processors MPEG4-ASP video decoder, combination of SIMD-DSP, firmware & hardware accelerators |
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